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Core8051
rst
clk
debugreq
debugack
debugstep
debugprog
fetch
flush
instr
NOP
LCALL
LJMP
Figure 23 ? The Run/Stop Control
Single-Step Mode
To execute one instruction in the debug mode, the OCI
asserts a signal debugstep for one system clock. The CPU
responds by negating debugack, executing one user or
rst
clk
debugreq
debugack
debugstep
debugprog
fetch
flush
debugger instruction, and then asserting debugack. The
OCI can set debugprog high for execution of a debugger
instruction or set debugprog low for execution of a user
instruction (see Figure 24 ).
instr
user instr NOP
usr instr CPL bit NOP
LCALL
LJMP
Figure 24 ? Single-Step Mode
Software Breakpoint
When the CPU executes the opcode 0xA5, the core enters
debug mode and asserts the debugack signal. The
rst
clk
debugreq
debugack
debugstep
debugprog
fetch
flush
debugger responds by setting debugreq high. The CPU
leaves the debug mode when debugreq is high for at
least one clock period and then goes low.
instr
A5
NOP
LCALL
LJMP
Figure 25 ? Software Breakpoint
38
v6.0
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相关代理商/技术参数
CORE8051-EV 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:Core8051
CORE8051-SN 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:Core8051
CORE8051-SR 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:Core8051
CORE8051-UR 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:Core8051
CORE8051-XX 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:Core8051
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